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jxlcwy铁杆木虫 (著名写手)
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从各个试样的阻抗谱分析谱(图5)可以看出,在测试频率为20 kHz一1 MHz的宽频范围内,各个样品的复阻抗谱都存在两段半圆弧,而且随着SiO2含量的增大,各个试样半圆弧的位置依次明显向电阻增大的方向移动,并且其圆弧半径也相应随之增大,据此则可以推断晶界电阻随SiO2含量的增多而明显增大。从图5中的内插图可以看出,当延长高频端所对应的半圆弧与Z′轴相交时,各个交点将聚集在大致相同的位置,由此可以推断出各个试样的晶粒电阻变化不大。所以,介电损耗的降低主要是由于SiO2的加入,使陶瓷内部晶界电阻增大而提高了CCTO陶瓷内部晶粒之间绝缘性所致。 求大虾帮忙翻译这段,不要用软件翻译的,那样语序完全不对。谢谢高手来帮忙了! |
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【答案】应助回帖
jxlcwy(金币+20, 翻译EPI+1): ★★★★★最佳答案 2012-02-22 14:21:06
| From each specimen impedance spectrum analysis spectrum (Figure 5) can be seen, the complex impedance spectra of various samples within the range of the test frequency of 20 kHz to 1 MHz broadband , there are two semi-circular arc , and with the SiO2 content increases, moving the location of each sample semi- circular arc in turn significantly to the increase in electrical resistance , and its radius corresponding increases accordingly you can infer that the grain boundary resistance significantly increased with the increase of SiO2 content .It can be seen from within the illustration in Figure 5 , when to extend the high frequency end of the corresponding semi- circular arc with the Z ' axis intersect each intersection will be gathered in much the same position , which can infer the grain of each specimen resistance little change.Therefore, the dielectric loss of SiO2 in ceramic internal grain boundary resistance increases and improved due to the insulation between the CCTO ceramic internal grain . |
2楼2012-02-22 12:54:51













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