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顺卓微电子（西安）有限公司诚聘IC designer人才
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IC验证工程师: Skills & Experience： • Typically, 1-2 years’ experience. Guided by program or project objectives. • Complex and large-scale SOC/Subsystem/IP/ASIC Design/Integration/Verification experiences. Strong knowledge of ARM Processor or Industry bus standard (PCI-e, HT, USB, AMBA) or Multimedia/Video/GPU/DDR is preferred. • Good knowledge of UVM/OVM/VMM is a plus. • Good knowledge of Verilog/C/C++/System C/SystemVerilog. • Solid background of random techniques, coverage-driven verification environment with SVA/PSL assertions. • Strong ability of scripting languages such as Perl, Python, Makefile, C Shell. • Familiar with EDA tools, i.e. Synopsys VCS, Cadence IUS, Mentor QuestaSim, Spyglass . . . • Low-power design/implementation/simulation flow with UPF/CPF. • The ability to do Digital-Analog-Mixed simulations and develop UVM AMS models. • Strong cooperation skills with global teams and communication skills with the ability to convey complex technical concepts to other design/verification peers in verbal or written form. • Good at English for communication in talking/writing/reading • A high level of self-motivation and the ability to be a self-starter. • Able to take multi-assignments from different customers/Teams • Flexible on the new skilled tasks related to Front-end with the guidance from other technical experts like Chip Design, Physical Design and DFT • Be open, passion and capability to work under high pressure. 后端工程师： Skills & Experience： • Typically, 1-2 years’ experience. Guided by program or project objectives. • Familiar with one or more of the following tools: o PnR using either Synopsys ICC, Cadence EDI, Mentor Olympus o Synthesis using either Synopsys DC or Cadence RC o Experience of Formality or Formalpro. o Experience of Mentor Calibre or Synopsys IC Validator • Serves as an independent individual contributor to technical project • Demonstrates capability as a problem solver with an ability to work individually or as part of a team • Evaluates issues and defines solutions as part of a team or takes the lead in solving the issue. • Broadens cross disciplinary knowledge through new assignments • Flexible on the new skilled tasks related to Backend with the guidance from other technical experts like DFT and Design Verification DFT工程师： Skills & Experience: • Typically, 1-2 years’ experience. Guided by program or project objectives. • Familiar with DFT tools from Mentor, Synopsys, or Cadence: o Scan/MBIST/BSD/LBIST insertion using either Mentor Tessent, Synopsys DC, or Cadence RC; o ATPG using either Mentor Tessent, Synopsys TetraMax, or Cadence ET; o Pattern verification using VCS/NC-Verilog/NC-sim/ModelSim • Good knowledge of DFT; • Experience of DFT architecture design • Serves as an independent individual contributor to technical project • Demonstrates capability as a problem solver with an ability to work individually or as part of a team • Evaluates issues and defines solutions as part of a team or takes the lead in solving the issue. • Broadens cross disciplinary knowledge through new assignments • Flexible on the new skilled tasks related to Backend with the guidance from other technical experts like Physical Design and Design Verification |
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