| ²é¿´: 1453 | »Ø¸´: 16 | ||
| ¡¾½±Àø¡¿ ±¾Ìû±»ÆÀ¼Û5´Î£¬×÷ÕßÓ°×Ó´«ËµÔö¼Ó½ð±Ò 4 ¸ö | ||
| µ±Ç°Ö÷ÌâÒѾ´æµµ¡£ | ||
| µ±Ç°Ö»ÏÔʾÂú×ãÖ¸¶¨Ìõ¼þµÄ»ØÌû£¬µã»÷ÕâÀï²é¿´±¾»°ÌâµÄËùÓлØÌû | ||
[×ÊÔ´]
¡¾×ªÌù¡¿Verilog HDL»Æ½ð½Ì³ÌÌײ͡¾ÒÑËÑÎÞÖØ¸´¡¿
|
||
|
±¾Ìײ͹²°üÀ¨Î岿·ÖÄÚÈÝ ½ÔÊDZ¾ÈË´Ó±¾¿ÆÊÕ²ØÖÁ½ñµÄµä²Ø×÷Æ· ǰÈý¸½¼þÌØ±ðÊʺÏÐÂÊÖÈëÃÅ ºóÁ½¸öÊʺϽϸ߲ã´ÎÈËԱʹÓà ¸½¼þ¼ûÏ Èç¹ûÄã¾õ×Å»¹ÐÐ,±ðÍüÁ˸ø¸öÆÀ¼Û 3Q Ò»:Verilog»ù´¡ÖªÊ¶ ¶þ:VerilogÓïÑÔµäÐÍÀýÎö Èý:ModelsimʹÓÃ½Ì³Ì ËÄ:HDL±àÂë·ç¸ñÓë±àÂëÖ¸ÄÏ Îå:TestBenchµÄÊéд [search]Verilog½Ì³Ì[/search] [ Last edited by sinapdb on 2007-12-4 at 19:42 ] |
» ²ÂÄãϲ»¶
±¾¿Æ211£¬±¨¿¼085601-310·Ö
ÒѾÓÐ14È˻ظ´
RY£ºÖйú²ú³öµÄ¿ÆÑ§À¬»øÂÛÎÄ£¬¾ø¶ÔÊýÁ¿ºÍ±ÈÀý¶¼ÊÀ½çµÚÒ»
ÒѾÓÐ16È˻ظ´
297£¬¹¤¿Æµ÷¼Á?ºÓÄÏũҵ´óѧ±¾¿Æ
ÒѾÓÐ7È˻ظ´
ҩѧÇóµ÷¼Á
ÒѾÓÐ5È˻ظ´
ʳƷÓëÓªÑø£¨0955£©271Çóµ÷¼Á
ÒѾÓÐ14È˻ظ´
366Çóµ÷¼Á
ÒѾÓÐ10È˻ظ´
085408¹âµçÐÅÏ¢¹¤³Ìר˶355Ò»Ö¾Ô¸³¤´º¹â»úËùµ÷¼Á
ÒѾÓÐ13È˻ظ´
һ־Ը³¶«´óѧ071000ÉúÎïѧѧ˶³õÊÔ·ÖÊý276Çóµ÷¼Á
ÒѾÓÐ25È˻ظ´
ҩѧ305Çóµ÷¼Á
ÒѾÓÐ9È˻ظ´
ת³¤Æ¸ÁË
ÒѾÓÐ6È˻ظ´
windyz
ÈÙÓþ°æÖ÷ (ÕýʽдÊÖ)
- Ó¦Öú: 0 (Ó×¶ùÔ°)
- ¹ó±ö: 0.852
- ½ð±Ò: 5070.4
- Ìû×Ó: 696
- ÔÚÏß: 74.4Сʱ
- ³æºÅ: 489599
8Â¥2008-03-18 01:49:01
|
ÖØ°õ³ö»÷£¬Ôٴβ¹³ä Áù£ºVerilogHDL Design Guideline ÓÉÓÚÎļþ±È½Ï´ó£¬ÒÑÉÏ´«ÖÁºè²¨¼ÒÔ°£ºhttp://lonefish1999.home.imhb.cn/ Óû§Ãû£ºlonefish1999 ÃÜÂ룺654321 Æß£ºÈçºÎдºÃ״̬»ú ¼û¸½¼þ |
3Â¥2007-11-29 22:26:27
5Â¥2007-12-07 16:02:53
11Â¥2008-04-02 07:01:18
¼òµ¥»Ø¸´
lily1920813Â¥
2011-08-18 09:00
»Ø¸´
ÎåÐÇºÃÆÀ ¶¥Ò»Ï£¬¸Ðл·ÖÏí£¡
lily1920814Â¥
2011-08-18 09:01
»Ø¸´
ÈýÐÇºÃÆÀ ¶¥Ò»Ï£¬¸Ðл·ÖÏí£¡














»Ø¸´´ËÂ¥