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【分享】High Performance Heterogeneous Computing.Wiley.2009[New]
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High Performance Heterogeneous Computing 免责声明 本资源来自于互联网，仅供网络测试之用，请务必在下载后24小时内删除！所有资源不涉及任何商业用途。发帖人不承担由下载使用者引发的一切法律责任及连带责任！ 著作权归原作者或出版社所有。未经发贴人conanwj许可，严禁任何人以任何形式转贴本文，违者必究！ 如果本帖侵犯您的著作权，请与conanwj联系，收到通知后我们将立即删除此帖！ Authors(Editors): Alexey L. Lastovetsky University College Dublin Jack J. Dongarra University of Tennessee Publisher: Wiley Pub Date: 2009 Pages: 267 ISBN: 978-0-470-04039-3 Preface In recent years, the evolution and growth of the techniques and platforms commonly used for high - performance computing (HPC) in the context of different application domains have been truly astonishing. While parallel computing systems have now achieved certain maturity, thanks to high - level libraries (such as ScaLAPACK, the scalable linear algebra package ) or runtime libraries (such as MPI, the message passing interface ), recent advances in these technologies pose several challenging research issues. Indeed, current HPC - oriented environments are extremely complex and very diffi cult to manage, particularly for extreme - scale application problems. At the very low level, latest - generation CPUs are made of multicore processors that can be general purpose or highly specialized in nature. On the other hand, several processors can be assembled into a so - called symmetrical multiprocessor (SMP), which can also have access to powerful specialized processors, namely graphics processing units (GPUs), which are now increasingly being used for programmable computing resulting from their advent in the video game industry, which signifi cantly reduced their cost and availability. Modern HPC - oriented parallel computers are typically composed of several SMP nodes interconnected by a network. This kind of infrastructure is hierarchical and represents a fi rst class of heterogeneous system in which the communication time between two processing units is different, depending on whether the units are on the same chip, on the same node, or not. Moreover, current hardware trends anticipate a further increase in the number of cores (in a hierarchical way) inside the chip, thus increasing the overall heterogeneity even more toward building extreme - scale systems. At a higher level, the emergence of heterogeneous computing now allows groups of users to benefi t from networks of processors that are already available in their research laboratories. This is a second type of infrastructure where both the network and the processing units are heterogeneous in nature. Specifi cally, the goal here is to deal with networks that interconnect a large number of heterogeneous computers that can signifi cantly differ from one another in terms of their hardware and software architecture, including different types of CPUs operating at different clock speeds and under different design paradigms, and with different memory sizes, caching strategies, and operating systems. At the high end, computers are increasingly interconnected together throughout wide area networks to form large - scale distributed systems with high computing capacity. Furthermore, computers located in different laboratories can collaborate in the solution of a common problem. Therefore, the current trends of HPC are clearly oriented toward extreme - scale, complex infrastructures with a great deal of intrinsic heterogeneity and many different hierarchical levels. It is important to note that all the heterogeneity levels mentioned above are tightly linked. First, some of the nodes in computational distributed environments may be multicore SMP clusters. Second, multicore chips will soon be fully heterogeneous with special - purpose cores (e.g., multimedia, recognition, networking), and not only GPUs, mixed with general - purpose ones. Third, these different levels share many common problems such as effi cient programming, scalability, and latency management. The extreme scale of these environments comes from every level: (a) low level: number of CPUs, number of cores per processor; (b) medium level: number of nodes (e.g., with memory); (c) high level: distributed/large - scale (geographical dispersion, latency, etc.); and (d) application: extreme - scale problem size (e.g., calculation intensive and/or data intensive). It is realistic to expect that large - scale infrastructures composed of dozens of sites, each composed of several heterogeneous computers, some having thousands of more than 16 - core processors, will be available for scientists and engineers. Therefore, the knowledge on how to effi ciently use, program, and scale applications on such future infrastructures is very important. While this area is wide open for research and development, it will be unfair to say that it has not been studied yet. In fact, some fundamental models and algorithms for these platforms have been proposed and analyzed. First programming tools and applications have been also designed and implemented. This book gives the state of the art in the fi eld. It analyzes the main challenges of high - performance heterogeneous computing and presents how these challenges have been addressed so far. The ongoing academic research, development, and uses of heterogeneous parallel and distributed computing are placed in the context of scientifi c computing. While the book is primarily a reference for researchers and developers involved in scientifi c computing on heterogeneous platforms, it can also serve as a textbook for an advanced university course on high - performance heterogeneous computing. Alexey L. Lastovetsky Jack J. Dongarra 本资源链接售价0分，共6个可选网络硬盘链接，1.94 MB，保质期2010-08-31。 -------------------------------------------------------------------------------------------------------- https://www.easy-share.com/1910144017/High Performance Heterogeneous Computing.Wiley.p267.2009.rar https://rapidshare.com/files/384 ... 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