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松山湖材料实验室招聘功率半导体器件工程师;技术书写工程师;烧结膏/电子封装材料工程�
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Power Device Engineer 功率半导体器件工程师 The power device engineer will be responsible for the benchmarking, characterization, testing and optimal performance definition in all levels of the power electronic applications from bare die, packaged platform, and systems. You are also responsible for product datasheet maintenance with all required data and format. You will work closely with the cross disciplinary team members for product development and product performance definition and characterization. 功率器件工程师将负责裸芯片、封装平台和系统的所有级别的功率电子应用中的基准测试、表征、测试和最佳性能定义。同时该职位还将负责使用所有必需的数据和格式维护产品数据表，与跨学科团队成员紧密合作，以进行产品开发以及产品性能的定义和表征。 Job Responsibility 1, Work with system engineer to understand the system level requirements for the product. Propose appropriate bare die options with available sourcing channel. Proactively acquire die samples (including mechanical die) for characterization and record the data, and quotes as part of the proposal. 与系统工程师一起了解产品的系统级要求，提示适当的裸芯片候选产品，并挖掘可用的采购渠道，主动获取芯片样品（包括机械样品）以进行表征并记录数据，并作为报价的一部分进行报价。 2, Characterization of power module sample and provide feedback to design for performance update. Work with system engineer regarding module level update. Collect all data necessary for datasheet preparation. 功率模块样品的表征，并为设计提供反馈以进行性能更新。与系统工程师合作进行模块级别更新，收集产品数据手册所需要的数据。 3, Work with testing engineer regrading all biased qualification/reliability testing and data collection. Work with design engineer for fixture design required by all testing. 与测试工程师合作，对所有qual测试以及可靠性测试进行数据收集，与设计工程师合作进行测试夹具的设计。 4, Co-owner of list of materials for testing in the High Power Lab. 大功率电力电子实验室中，同步负责所有测试材料。 5, Propose FA per poor performance observed and/or failed samples. Work with FA to define possible cross sectional area for further investigation. 根据观察到的不良性能和、或失效的样本提出可能的失效原因，与FA工程师合作确定可能的检测的横断界面，以供进一步进行失效的根本原因分析。 Requirements 1, B.S. or above degree in Electrical, Electronics, System Engineering, and Physics or related discipline 电气工程， 电子，系统工程，物理等相关专业本科及以上学历。 2, Experience or familiar with high voltage/high power applications. 熟悉或在高压、大功率电力电子应用领域有经验。 3, Experience and/or knowledge in power electronic devices such as Si IGBT, MOSFET, Diode, SiC MOSFET, SBD, and GaN… etc. 有功率器件，如Si IGBT, MOSFET, Diode, SiC MOFET, SBD,以及GaN的知识储备或经验。 4, Familiar with characterization and testing of the power devices above. Know the Pros and Cons of each devices. 熟悉以上所属的功率器件的表征和测试，理解各种器件之间的特性及优劣势。 5, Familiar with device physics with certain knowledge in the processes of manufacturing 熟悉器件物理知识，且有一定的器件生产制造过程知识。 6, Passion in Wide Band Gap devices performance enhancement in all levels of applications 对提高WBG器件在系统中应用的性能充满激情。 职位名称：技术书写工程师 职位描述：技术书写工程师将负责协助工程师制定、组织、编写公司需要的技术文件，并负责管理技术文件的更新和修订。 主要职责：1、与内部团队合作以了解产品文档要求； 2、与项目工程师共同编写和编辑技术文档； 3、维护全面的技术术语和文档库； 4、分析文档以保持内容样式的连续性； 5、管理技术文献的更新和修订 任职要求：1、本科及以上学历，理工科毕业生； 2、能用英文进行沟通和书写； 3、有较好的文字功底，能掌握技术写作规范，具备良好的逻辑思维能力； 4、有良好的团队合作精神，注重细节。 Sintering Paste/Electronic Packaging Material Engineer 烧结膏/电子封装材料工程师 The Sintering Paste/Electronic Packaging Material Engineer will be responsible for the nano sintering material selection, binder selection, synthesis, and process development for sintering paste used for power electronic applications. And also responsible for research and development of potential packaging materials by synthesis, composites and/or hybrid material build-up. 烧结膏/电子封装材料工程师主要负责用于功率电子应用的纳米烧结材料的选择，粘合剂选择，合成， 工艺的开发。同时该工程师还负责潜在封装材料的开发， 包括某些创新封装材料，复合材料和/或混合材料的开发。 Job Responsibilities 工作职责 1, Work with all required suppliers to source raw materials for sintering paste synthesis. 调研潜在供应商，确定原材料供应商。 2, Conduct process development and optimization to confirm the optimal formula to synthesize sintering paste with appropriate sintering process definition. 进行工艺开发和优化，以确认最佳的配方， 以最适当的烧结工艺定义合成烧结膏。 3, Work with testing engineer, FA engineer and external suppliers to assess mechanical, thermal and electrical properties of the sintered paste. 同测试工程师，失效模式分析工程师以及外部的供应商，对所合成的材料进行机械性能、热性能以及电气性能的评估。 4, Work with testing engineer to set up qualification standards and reliability assessment of sintered paste. 与测试工程师紧密合作，建立材料质量检测以及可靠性检测的标准。 5, Research opportunities in new synthesis of packaging materials such as alloys, organic materials for thermal management/ packaging, inorganic packaging/thermal management materials or hybrid/ Composite materials for packaging 进行创新封装材料的研发，如合金材料， 用于封装或热管理的有机/无机材料，复合材料等。 6, Research materials for surface treatment to enhance either physical or chemical properties 通过物理或化学方法进行表面处理的材料的研发。 Requirements 1, BS degree or above in Material Science/Engineering, Chemical Engineering and related discipline or with certain years of experience. 硕士及以上学历，材料科学， 材料工程， 化学工程或相关专业，或有相关领域工作经验。 2, Work or research experience in sintering paste development. 有烧结膏领域工作或研发经验。 3, Work or research or interested in electronic packaging materials synthesis/development. 有电子封装材料领域的研发或工作经验， 或对此领域感兴趣者优先。 4, Good background in material characterization with appropriate tools such as X-ray, EDX, SEM, spectrum analyzer, … etc. 有材料表征工具如X-Ray, SEM, EDX, Spectrum analyzer经验。 5, Familiar with analysis, process and synthesis lab setup, equipment, and safety protocols. 熟悉材料分析，工艺及材料合成实验室的设置，设备及安全规程。 邮箱：2147162848@qq.com [ 来自版块群 广东 ] |
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