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ÎÄÕÂÍÆ¼ö£º¼«ÏÞ³ß´ç¼ÆËã»úÌåϵ½á¹¹£¨Extreme-scale computer architecture£©
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ÎÄÕÂÁ´½Ó£¨¿ª·Å»ñÈ¡£©£º https://doi.org/10.1093/nsr/nwv085 ¼ÆËã»ú¾§Ìå¹ÜµÄ³ß´ç²»¶Ï¼õС£¬¶ÔÓÚоƬ¼¯³É»¯µÄÒªÇóÔ½À´Ô½¸ß¡£¡°¼«ÏÞ³ß´ç¼ÆËã»úÌåϵ½á¹¹£¨Extreme-scale computer architecture£©¡±µÄ¸ÅÄîÓ¦Ô˶øÉú£¬¼«ÏÞ³ß´ç¼ÆËã»úÌåϵ½á¹¹Éè¼ÆµÄºËÐÄÊÇÄÜÁ¿Ð§ÂÊ£¨energy efficiency£©µÄÌá¸ß¡£ÔÚ¡¶¹ú¼Ò¿ÆÑ§ÆÀÂÛ¡·£¨National Science Review£©µÄÕâÆªperspectiveÎÄÕÂÖУ¬×÷ÕßJosep Torrellas¶ÔÕâÒ»ÁìÓòÃæÁÙµÄÌôÕ½ºÍ½â¾ö·½·¨½øÐÐÁËÏêϸ½éÉÜ¡£ Introduction£º As transistor sizes continue to scale down, we are about to witness extraordinary levels of chip integration. Sometime early in the next decade, as we reach 7 nm, we will be able to integrate, for example, 1000 sizable cores and substantial memory on a single die. There are many unknowns as to how to build a general-purpose architecture in such an environment. However, we know that the main challenge will be to make it highly energy efficient. Energy and power consumption have emerged as the main obstacles to designing more capable architectures. Given this energy efficiency challenge, researchers have coined the term ¡®Extreme Scale Computer Architecture¡¯ to refer to computer organizations that, loosely speaking, are 100¨C1000 times more capable than current systems for the same power consumption and physical footprint. For example, these organizations should deliver a datacenter that provides exascale performance (10^18 operations per second) for 20 MW, a departmental server that provides petascale performance (10^15 operations per second) for 20 KW, and a portable device that provides sustained terascale performance (10^12 operations per second) for 20 W. Extreme-scale computing is concerned with technologies that are applicable to all machine sizes¡ªnot just high-end systems. Extreme-scale computer architectures need to be designed for energy efficiency from the ground up. They need to have efficient support for concurrency, since only massive parallelism will deliver this performance. They should also minimize data transfers¡ªsince moving data around is a major source of energy consumption. Finally, they need to leverage new technologies that will be developed in the next few years. These technologies include low supply voltage (Vdd) operation, 3D die stacking, resistive memories, and photonic interconnects. In this paper, we outline some of challenges that appear at different layers of the computing stack, and some of the techniques that can be used to address them. ¡¶¹ú¼Ò¿ÆÑ§ÆÀÂÛ¡·ÊÇÖпÆÔºÖ÷¹ÜµÄÓ¢ÎÄ×ÛÊöÐÔѧÊõÆÚ¿¯£¬×îÐÂÓ°ÏìÒò×Ó£¨2016£©Îª8.843¡£ |
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