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nuptsww木虫 (小有名气)
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[求助]
翻译 一段 英文
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A typical FET is constructed with the basic components as shown in Fig. 1: source, drain and gate electrodes, a dielectric layer, and a semiconducting layer. OFETs adopt the architecture of the thin film transistor (TFT), which has proven its adaptability with low conductivity materials. The current flow between the drain and source electrodes is modulated by the applied gate voltage. When no gate voltage (VG) is applied, the drain current (ID) is very low if the semiconductor is not highly doped and the transistor is normally off. With an increase in the gate voltage, a layer of mobile charges can accumulate at the interface between the semiconductor and insulator. Then, the current is bigger due to the increased charge carriers and thus the transistor is in the on state. That is the operating principle of OFETs. Fig. 2 shows a typical output characteristic of an OFET, which corresponds to a device using copper phthalocyanine (CuPc) as the semiconductor, 500 nm thick SiO2 (Ci, 10 nF cm22) modified with an octadecyltrichlorosilane (OTS) selfassembled monolayer (SAM) as the gate insulator, a heavily doped n-type Si wafer as the gate electrode and gold as the source and drain electrodes. When the gate electrode is biased negatively, the transistor based on CuPc operates in the accumulation mode and the holes are the major charge carriers in the transistor channel. From the output, we can see that with the drain voltage increase, the device gradually enters the saturation regime from the linear regime where the drain current becomes independent of the drain bias. The current ID modulated by VG is approximately determined from the following equations: |
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yuanbing0000
至尊木虫 (小有名气)
- 翻译EPI: 21
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爱与雨下(金币+2): 2012-03-11 12:40:07
nuptsww(金币+20, 翻译EPI+1): ★★★★★最佳答案 2012-03-11 16:12:19
爱与雨下(金币+2): 2012-03-11 12:40:07
nuptsww(金币+20, 翻译EPI+1): ★★★★★最佳答案 2012-03-11 16:12:19
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供参考: 典型的FET(场效应晶体管)由图1所示的基本元件组成:源极、栅极、门电路元件,介质层和半导体层。OFET采用薄膜晶体管结构,它与低传导性材料的适应性已得到证明。栅极和源极之间的电流由外加的门电压调节。当不加门电压时,如果半导体掺杂度不高且晶体管正常的话,栅电流很低。随着门电压增加,移动的电荷会聚集在半导体和绝缘体之间的界面。由于电荷载体增加,电流变大,因此晶体管出于“开”的状态。这就是OFET的工作原理。图2 所示为OFET的输出特性,它与用铜酞菁(CuPc)作为半导体的设备呼应,500毫米厚的二氧化硅(SiO2)根据自组合单层十八基三氯硅烷作为门绝缘体,掺杂度高的N型硅晶片作为门电极,黄金作为源极和栅极而修正。当门电极阴极加偏压,基于铜酞菁(CuPc)的晶体管在累加态下工作,晶体管信道内的空穴是主要的电荷载体。我们从输出可以看出,随着栅电压的增加,设备逐渐由线性区进入饱和区,在线性区内删电流与漏偏压不相关。目前由可变增益(VG)调节的仪器零点偏移(ID)近似地由下列方程确定.。 |
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